{"id":111342,"date":"2024-10-18T16:09:38","date_gmt":"2024-10-18T16:09:38","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1450-6-2005\/"},"modified":"2024-10-24T22:01:09","modified_gmt":"2024-10-24T22:01:09","slug":"ieee-1450-6-2005","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1450-6-2005\/","title":{"rendered":"IEEE 1450.6 2005"},"content":{"rendered":"
New IEEE Standard – Active. The Core Test Language (CTL) is a language created for a System-on-Chip flow (or SoC flow), where a design created by one group is reused as a sub-design of a design created by another group. In an SoC flow, the smaller design embedded in the larger design is commonly called a core and the larger design is commonly called the SoC. The core is a design provided by a core provider, and the task of incorporating the sub-design into the SoC is called Core System Integration.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
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1<\/td>\n | IEEE Std 1450.6\u2122-2005, IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data\u2014Core Test … <\/td>\n<\/tr>\n | ||||||
6<\/td>\n | Introduction Notice to users Errata Interpretations Patents Participants <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
11<\/td>\n | 1. Overview 1.1 General <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | 1.2 SoC flow <\/td>\n<\/tr>\n | ||||||
14<\/td>\n | 1.3 Scope 1.4 Purpose 1.5 Limitations of this standard <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | 1.6 Structure of this standard 2. Normative references <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | 3. Definitions, acronyms, and abbreviations 3.1 Definitions 3.2 Acronyms and abbreviations <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | 4. CTL orientation and capabilities tutorial 4.1 Introduction <\/td>\n<\/tr>\n | ||||||
18<\/td>\n | 4.2 CTL for design configurations <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 4.3 CTL for structural information <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 4.4 CTL for test pattern information <\/td>\n<\/tr>\n | ||||||
36<\/td>\n | 4.5 Beyond the examples <\/td>\n<\/tr>\n | ||||||
37<\/td>\n | 5. Extensions to IEEE Std 1450-1999 and IEEE Std 1450.1-2005 5.1 STIL name spaces and name resolution 5.2 Optional statements of IEEE Std 1450-1999 5.3 Restricting the usage of SignalGroup and variable names <\/td>\n<\/tr>\n | ||||||
38<\/td>\n | 5.4 Additional reserved words 5.5 STIL statement\u2014extensions to IEEE Std 1450-1999, Clause 8 <\/td>\n<\/tr>\n | ||||||
39<\/td>\n | 5.6 Extensions to IEEE Std 1450-1999, 17.1 and 23.1 <\/td>\n<\/tr>\n | ||||||
42<\/td>\n | 5.7 Extensions associated with the LockStep construct of Clause 13 of IEEE Std 1450.1-2005 <\/td>\n<\/tr>\n | ||||||
46<\/td>\n | 6. Design hierarchy\u2014cores 6.1 CoreType block and CoreInstance statement 6.2 CoreType block syntax descriptions <\/td>\n<\/tr>\n | ||||||
47<\/td>\n | 6.3 CoreType block code example <\/td>\n<\/tr>\n | ||||||
48<\/td>\n | 7. Cell expression (cellref_expr) <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | 8. Environment block\u2014extensions to IEEE Std 1450.1-2005, Clause 17 8.1 General 8.2 Definition of FileReference keywords <\/td>\n<\/tr>\n | ||||||
53<\/td>\n | 8.3 Example of Environment block FileReference syntax 8.4 Extension to NameMaps <\/td>\n<\/tr>\n | ||||||
54<\/td>\n | 8.5 Extension to the inheritance of environment statements <\/td>\n<\/tr>\n | ||||||
55<\/td>\n | 9. CTLMode block 9.1 General 9.2 CTLMode syntax <\/td>\n<\/tr>\n | ||||||
57<\/td>\n | 9.3 CTLMode block\u2014syntax descriptions <\/td>\n<\/tr>\n | ||||||
63<\/td>\n | 9.4 CTLMode block syntax example <\/td>\n<\/tr>\n | ||||||
66<\/td>\n | 10. CTLMode\u2014Internal block 10.1 General 10.2 Internal syntax <\/td>\n<\/tr>\n | ||||||
70<\/td>\n | 10.3 Internal block syntax descriptions <\/td>\n<\/tr>\n | ||||||
86<\/td>\n | 10.4 Internal BlockSyntax examples <\/td>\n<\/tr>\n | ||||||
89<\/td>\n | 11. CTLMode\u2014ScanInternal block 11.1 General 11.2 ScanInternal syntax <\/td>\n<\/tr>\n | ||||||
91<\/td>\n | 11.3 ScanInternal block syntax descriptions 11.4 ScanInternal block syntax example <\/td>\n<\/tr>\n | ||||||
93<\/td>\n | 12. CTLMode\u2014CoreInternal block 12.1 General 12.2 CoreInternal syntax <\/td>\n<\/tr>\n | ||||||
94<\/td>\n | 12.3 CoreInternal block syntax descriptions 12.4 CoreInternal block syntax examples <\/td>\n<\/tr>\n | ||||||
95<\/td>\n | 13. CTLMode\u2014Relation Block 13.1 General 13.2 Relation syntax 13.3 Relation block syntax descriptions <\/td>\n<\/tr>\n | ||||||
97<\/td>\n | 13.4 Relation block syntax example <\/td>\n<\/tr>\n | ||||||
99<\/td>\n | 14. CTLMode\u2014ScanRelation block 14.1 General 14.2 ScanRelation syntax 14.3 ScanRelation block syntax descriptions 15. CTLMode\u2014External block 15.1 General <\/td>\n<\/tr>\n | ||||||
100<\/td>\n | 15.2 External statement syntax 15.3 External block syntax descriptions <\/td>\n<\/tr>\n | ||||||
103<\/td>\n | 15.4 External block syntax example 16. CTLMode\u2014PatternInformation block 16.1 PatternInformation syntax <\/td>\n<\/tr>\n | ||||||
106<\/td>\n | 16.2 PatternInformation block syntax descriptions <\/td>\n<\/tr>\n | ||||||
114<\/td>\n | 16.3 PatternInformation block syntax example <\/td>\n<\/tr>\n | ||||||
119<\/td>\n | Index <\/td>\n<\/tr>\n | ||||||
120<\/td>\n | A B C D <\/td>\n<\/tr>\n | ||||||
121<\/td>\n | E F I <\/td>\n<\/tr>\n | ||||||
122<\/td>\n | L M N O P R <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data-Core Test Language (CTL)<\/b><\/p>\n |