BS EN IEC 63093-7:2018:2019 Edition
$102.76
Ferrite cores. Guidelines on dimensions and the limits of surface irregularities – EER-cores
Published By | Publication Date | Number of Pages |
BSI | 2019 | 24 |
This part of IEC 63093 specifies the dimensions that are of importance for mechanical interchangeability for a preferred range of EER-cores made of ferrite, the essential dimensions of coil formers to be used with them as well the effective parameter values to be used in calculations involving them, and gives guidelines on allowable limits of surface irregularities applicable to EER-cores.
This document is a specification useful in the negotiations between ferrite core manufacturers and customers about surface irregularities.
The use of “derived” standards which give more detailed specifications of component parts while still permitting compliance with this document is discussed in Annex A.
PDF Catalog
PDF Pages | PDF Title |
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2 | undefined |
6 | CONTENTS |
8 | FOREWORD |
10 | 1 Scope 2 Normative references 3 Terms and definitions 4 Primary dimensions 4.1 General |
11 | 4.2 Dimensions of EER-cores 4.2.1 Principal dimensions Figures Figure 1 – Dimensions of EER-cores Tables Table 1 – Dimensions of EER-cores |
12 | 4.2.2 Effective parameter and Amin values 4.3 Dimensional limits for coil formers Figure 2 – Essential dimensions of coil formers Table 2 – Effective parameter values of EER-cores |
13 | 5 Limits of surface irregularities 5.1 General Figure 3 – Examples of surface irregularities Table 3 – Dimensional limits for coil formers |
14 | 5.2 Chips and ragged edges 5.2.1 General 5.2.2 Chips and ragged edges on the mating surfaces (see Figure 4) 5.2.3 Chips and ragged edges on the other surfaces (see Figure 4) Figure 4 – Chip locations for EER-cores |
15 | Table 4 – Area and length reference for visual inspection |
16 | 5.3 Cracks 5.4 Flash 5.5 Pull-outs Figure 5 – Cracks and pull-out locations for EER-cores |
17 | 5.6 Crystallites Figure 6 – Crystallite location for EER-cores Table 5 – Limits for cracks |
18 | 5.7 Pores Figure 7 – Pore location for EER-cores |
19 | Annex A (normative) Derived standards |
20 | Annex B (normative) Example of dimensions for gauges to check the dimensions of EER-cores meeting this primary standard B.1 General B.2 Procedure and requirements Figure B.1 – Gauge dimensions Table B.1 – Gauge dimensions |
21 | Annex C (informative) Examples of allowable areas of chips Table C.1 – Allowable areas of chips for EER-cores |
22 | Bibliography |