{"id":226199,"date":"2024-10-19T14:42:03","date_gmt":"2024-10-19T14:42:03","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-62386-1022014\/"},"modified":"2024-10-25T08:36:56","modified_gmt":"2024-10-25T08:36:56","slug":"bs-en-62386-1022014","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-62386-1022014\/","title":{"rendered":"BS EN 62386-102:2014"},"content":{"rendered":"
IEC 62386-102:2014 is applicable to control gear in a bus system for control by digital signals of electronic lighting equipment. This electronic lighting equipment should be in line with the requirments of IEC 61347, with the addition of d.c. supplies. This second edition cancels and replaces the first edition published in 2009. This edition constitutes a technical revision. This edition includes the following significant technical changes with respect to the previous edition: a) elimination of all non-control gear relevant definitions, b) improvement of the requirements for control gear by clarifying the description, c) improvement of the test command iterations to increase the compatibility, d) addition of new commands, and e) the deletion of the requirements for: 1) timing; 2) control devices. The requirements for timing are now in Part 101 and the requirments for control devices are in Part 103. This publication is to be read in conjunction with \/2<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
6<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | INTRODUCTION Figures Figure 1 \u2013 IEC 62386 graphical overview <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions <\/td>\n<\/tr>\n | ||||||
20<\/td>\n | 4 General 4.1 General 4.2 Version number 5 Electrical specification 6 Interface power supply <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | 7 Transmission protocol structure 7.1 General 7.2 16 bit forward frame encoding 8 Timing Tables Table 1 \u2013 16-bit command frame encoding <\/td>\n<\/tr>\n | ||||||
22<\/td>\n | 9 Method of operation 9.1 General 9.2 Control gear 9.3 Dimming curve Figure 2 \u2013 Control gear directly operating a light source <\/td>\n<\/tr>\n | ||||||
23<\/td>\n | Figure 3 \u2013 Dimming curve Table 2 \u2013 Dimming curve tolerance (%, rounded to two decimals) <\/td>\n<\/tr>\n | ||||||
24<\/td>\n | Table 3 \u2013 Dimming curve <\/td>\n<\/tr>\n | ||||||
25<\/td>\n | 9.4 Calculating \u201ctargetLevel\u201d 9.5 Fading <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | Figure 4 \u2013 Level over time, fading up and down <\/td>\n<\/tr>\n | ||||||
27<\/td>\n | Table 4 \u2013 Fade times <\/td>\n<\/tr>\n | ||||||
28<\/td>\n | Table 5 \u2013 Fade rates <\/td>\n<\/tr>\n | ||||||
29<\/td>\n | Table 6 \u2013 Extended fade time – base value Table 7 \u2013 Extended fade time – multiplier <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 9.6 Min and max level 9.7 Commands <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | 9.8 Command iterations Figure 5 \u2013 Timing and response when receiving a command iteration <\/td>\n<\/tr>\n | ||||||
34<\/td>\n | 9.9 Modes of operation <\/td>\n<\/tr>\n | ||||||
35<\/td>\n | 9.10 Memory banks Table 8 \u2013 Basic memory map of memory banks <\/td>\n<\/tr>\n | ||||||
38<\/td>\n | Table 9 \u2013 Memory map of memory bank 0 <\/td>\n<\/tr>\n | ||||||
40<\/td>\n | Table 10 \u2013 Memory map of memory bank 1 <\/td>\n<\/tr>\n | ||||||
41<\/td>\n | 9.11 Reset 9.12 System failure <\/td>\n<\/tr>\n | ||||||
42<\/td>\n | 9.13 Power on <\/td>\n<\/tr>\n | ||||||
43<\/td>\n | 9.14 Assigning short addresses Table 11 \u2013 Power on timing <\/td>\n<\/tr>\n | ||||||
45<\/td>\n | 9.15 Failure state behaviour 9.16 Status information Table 12 \u2013 Control gear status <\/td>\n<\/tr>\n | ||||||
47<\/td>\n | 9.17 Non-volatile memory 9.18 Device types and features <\/td>\n<\/tr>\n | ||||||
48<\/td>\n | 9.19 Using scenes Table 13 \u2013 Scenes <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | 10 Declaration of variables Table 14 \u2013 Declaration of variables <\/td>\n<\/tr>\n | ||||||
51<\/td>\n | 11 Definition of commands 11.1 General 11.2 Overview sheets Table 15 \u2013 Standard commands <\/td>\n<\/tr>\n | ||||||
55<\/td>\n | Table 16 \u2013 Special commands <\/td>\n<\/tr>\n | ||||||
57<\/td>\n | 11.3 Level instructions <\/td>\n<\/tr>\n | ||||||
60<\/td>\n | 11.4 Configuration instructions <\/td>\n<\/tr>\n | ||||||
65<\/td>\n | 11.5 Queries <\/td>\n<\/tr>\n | ||||||
67<\/td>\n | Table 17 \u2013 Light source type encoding <\/td>\n<\/tr>\n | ||||||
69<\/td>\n | 11.6 Application extended commands <\/td>\n<\/tr>\n | ||||||
70<\/td>\n | 11.7 Special commands Table 18 \u2013 Device addressing with \u201cINITIALISE\u201d <\/td>\n<\/tr>\n | ||||||
74<\/td>\n | 12 Test procedures 12.1 General notes on test <\/td>\n<\/tr>\n | ||||||
76<\/td>\n | Figure 6 \u2013 Fading from MIN LEVEL to MAX LEVEL Figure 7 \u2013 Fading from MAX LEVEL to off Figure 8 \u2013 Normal fading for a PWM dimmer <\/td>\n<\/tr>\n | ||||||
77<\/td>\n | Figure 9 \u2013 Fading from MAX LEVEL to off for a PWM dimmer <\/td>\n<\/tr>\n | ||||||
78<\/td>\n | Table 19 \u2013 Unexpected outcome <\/td>\n<\/tr>\n | ||||||
79<\/td>\n | 12.2 Preamble <\/td>\n<\/tr>\n | ||||||
84<\/td>\n | Table 20 \u2013 Parameters for test sequence CheckFactoryDefault102 <\/td>\n<\/tr>\n | ||||||
88<\/td>\n | Table 21 \u2013 Parameters for test sequence CheckFactoryDefault201 <\/td>\n<\/tr>\n | ||||||
89<\/td>\n | Table 22 \u2013 Parameters for test sequence CheckFactoryDefault202 <\/td>\n<\/tr>\n | ||||||
90<\/td>\n | Table 23 \u2013 Parameters for test sequence CheckFactoryDefault203 Table 24 \u2013 Parameters for test sequence CheckFactoryDefault204 <\/td>\n<\/tr>\n | ||||||
91<\/td>\n | Table 25 \u2013 Parameters for test sequence CheckFactoryDefault205 Table 26 \u2013 Parameters for test sequence CheckFactoryDefault206 <\/td>\n<\/tr>\n | ||||||
92<\/td>\n | Table 27 \u2013 Parameters for test sequence CheckFactoryDefault207 Table 28 \u2013 Parameters for test sequence CheckFactoryDefault208 <\/td>\n<\/tr>\n | ||||||
93<\/td>\n | Table 29 \u2013 Parameters for test sequence CheckFactoryDefault209 <\/td>\n<\/tr>\n | ||||||
96<\/td>\n | 12.3 Physical operational parameters <\/td>\n<\/tr>\n | ||||||
97<\/td>\n | Table 30 \u2013 Parameters for test sequence Maximum and minimum system voltage <\/td>\n<\/tr>\n | ||||||
99<\/td>\n | Figure 10 \u2013 Current rating test <\/td>\n<\/tr>\n | ||||||
101<\/td>\n | Table 31 \u2013 Parameters for test sequence Transmitter voltages <\/td>\n<\/tr>\n | ||||||
102<\/td>\n | Table 32 \u2013 Parameters for test sequence Transmitter rising and falling edges <\/td>\n<\/tr>\n | ||||||
103<\/td>\n | Table 33 \u2013 Parameters for test sequence Transmitter rising and falling edges <\/td>\n<\/tr>\n | ||||||
104<\/td>\n | Table 34 \u2013 Parameters for test sequence Transmitter bit timing <\/td>\n<\/tr>\n | ||||||
106<\/td>\n | Table 35 \u2013 Parameters for test sequence Receiver frame timing <\/td>\n<\/tr>\n | ||||||
107<\/td>\n | Table 36 \u2013 Parameters for test sequence Receiver start-up behavior <\/td>\n<\/tr>\n | ||||||
109<\/td>\n | Table 37 \u2013 Parameters for test sequence Receiver bit timing <\/td>\n<\/tr>\n | ||||||
113<\/td>\n | Table 38 \u2013 Parameters for test sequence Extended receiver bit timing <\/td>\n<\/tr>\n | ||||||
114<\/td>\n | Table 39 \u2013 Parameters for test sequence Receiver frame violationand recovering after frame size violation <\/td>\n<\/tr>\n | ||||||
115<\/td>\n | Table 40 \u2013 Parameters for test sequence Receiver frame timing <\/td>\n<\/tr>\n | ||||||
117<\/td>\n | 12.4 Configuration instructions <\/td>\n<\/tr>\n | ||||||
119<\/td>\n | Table 41 \u2013 Parameters for test sequence RESET <\/td>\n<\/tr>\n | ||||||
124<\/td>\n | Table 42 \u2013 Parameters for test sequence Send twice timeout <\/td>\n<\/tr>\n | ||||||
133<\/td>\n | Table 43 \u2013 Parameters for test sequence Commands in-between <\/td>\n<\/tr>\n | ||||||
139<\/td>\n | Table 44 \u2013 Parameters for test sequence SET MAX LEVEL <\/td>\n<\/tr>\n | ||||||
140<\/td>\n | Table 45 \u2013 Parameters for test sequence SET MIN LEVEL <\/td>\n<\/tr>\n | ||||||
141<\/td>\n | Table 46 \u2013 Parameters for test sequence SET SYSTEM FAILURE LEVEL <\/td>\n<\/tr>\n | ||||||
144<\/td>\n | Table 47 \u2013 Parameters for test sequence SET POWER ON LEVEL <\/td>\n<\/tr>\n | ||||||
145<\/td>\n | Table 48 \u2013 Parameters for test sequence SET FADE TIME <\/td>\n<\/tr>\n | ||||||
146<\/td>\n | Table 49 \u2013 Parameters for test sequence SET FADE RATE <\/td>\n<\/tr>\n | ||||||
147<\/td>\n | Table 50 \u2013 Parameters for test sequence SET SCENE \/ REMOVE FROM SCENE <\/td>\n<\/tr>\n | ||||||
148<\/td>\n | Table 51 \u2013 Parameters for test sequence ADD TO GROUP \/ REMOVE FROM GROUP <\/td>\n<\/tr>\n | ||||||
149<\/td>\n | Table 52 \u2013 Parameters for test sequence SET SHORT ADDRESS <\/td>\n<\/tr>\n | ||||||
150<\/td>\n | Table 53 \u2013 Parameters for test sequence SET EXTENDED FADE TIME <\/td>\n<\/tr>\n | ||||||
153<\/td>\n | Table 54 \u2013 Parameters for test sequence Reset\/Power-on values <\/td>\n<\/tr>\n | ||||||
156<\/td>\n | 12.5 Memory banks Table 55 \u2013 Parameters for test sequence DTR0 \/ DTR1 \/ DTR2 <\/td>\n<\/tr>\n | ||||||
160<\/td>\n | Table 56 \u2013 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 0 <\/td>\n<\/tr>\n | ||||||
163<\/td>\n | Table 57 \u2013 Parameters for test sequence READ MEMORY LOCATION on Memory Bank 1 <\/td>\n<\/tr>\n | ||||||
168<\/td>\n | Table 58 \u2013 Parameters for test sequence Memory bank writing <\/td>\n<\/tr>\n | ||||||
171<\/td>\n | Table 59 \u2013 Parameters for test sequence ENABLE WRITE MEMORY: writeEnableState <\/td>\n<\/tr>\n | ||||||
174<\/td>\n | Table 60 \u2013 Parameters for test sequence ENABLE WRITE MEMORY: timeout \/ command in-between <\/td>\n<\/tr>\n | ||||||
176<\/td>\n | Table 61 \u2013 Parameters for test sequence RESET MEMORY BANK:timeout \/ command in-between <\/td>\n<\/tr>\n | ||||||
178<\/td>\n | 12.6 Level instructions Table 62 \u2013 Parameters for test sequence RESET MEMORY BANK <\/td>\n<\/tr>\n | ||||||
180<\/td>\n | Table 63 \u2013 Parameters for test sequence Level instructions: Basic behaviour <\/td>\n<\/tr>\n | ||||||
183<\/td>\n | Table 64 \u2013 Parameters for test sequence FADE TIME: possible values <\/td>\n<\/tr>\n | ||||||
186<\/td>\n | Table 65 \u2013 Parameters for test sequence FADE TIME: transitions <\/td>\n<\/tr>\n | ||||||
188<\/td>\n | Table 66 \u2013 Parameters for test sequence FADE TIME: fading to 0 <\/td>\n<\/tr>\n | ||||||
191<\/td>\n | Table 67 \u2013 Parameters for test sequence FADE TIME: small steps fading <\/td>\n<\/tr>\n | ||||||
192<\/td>\n | Table 68 \u2013 Parameters for test sequence FADE TIME: extended fade time <\/td>\n<\/tr>\n | ||||||
195<\/td>\n | Table 69 \u2013 Parameters for test sequence FADE RATE: possible values <\/td>\n<\/tr>\n | ||||||
196<\/td>\n | Table 70 \u2013 Parameters for test sequence FADE RATE: possible values <\/td>\n<\/tr>\n | ||||||
197<\/td>\n | Table 71 \u2013 Parameters for test sequence FADE RATE: transitions <\/td>\n<\/tr>\n | ||||||
198<\/td>\n | Table 72 \u2013 Parameters for test sequence FADE RATE: extended fade time <\/td>\n<\/tr>\n | ||||||
201<\/td>\n | Table 73 \u2013 Parameters for test sequence FADE TIME\/FADE RATE: stop fading by setting MIN\/MAX levels <\/td>\n<\/tr>\n | ||||||
205<\/td>\n | Table 74 \u2013 Parameters for test sequence FADE TIME\/FADE RATE: stop fading <\/td>\n<\/tr>\n | ||||||
207<\/td>\n | Table 75 \u2013 Parameters for test sequence FADE TIME\/FADE RATE: stop fading when a command is sent, check timing <\/td>\n<\/tr>\n | ||||||
212<\/td>\n | Table 76 \u2013 Parameters for test sequence FADE TIME\/FADE RATE: stop fading during startup <\/td>\n<\/tr>\n | ||||||
214<\/td>\n | Table 77 \u2013 Parameters for test sequence Level instructions: combined instructions <\/td>\n<\/tr>\n | ||||||
219<\/td>\n | Table 78 \u2013 Parameters for test sequence PowerOnLevel and SystemFailureLevel <\/td>\n<\/tr>\n | ||||||
221<\/td>\n | Table 79 \u2013 Parameters for test sequence ENABLE DAPC SEQUENCE <\/td>\n<\/tr>\n | ||||||
222<\/td>\n | Table 80 \u2013 Parameters for test sequence GO TO LAST ACTIVE LEVEL <\/td>\n<\/tr>\n | ||||||
224<\/td>\n | Table 81 \u2013 Parameters for test sequence GO TO SCENE <\/td>\n<\/tr>\n | ||||||
226<\/td>\n | Table 82 \u2013 Parameters for test sequence Power on: level control commands <\/td>\n<\/tr>\n | ||||||
227<\/td>\n | Table 83 \u2013 Parameters for test sequence Logarithmic dimming curve <\/td>\n<\/tr>\n | ||||||
228<\/td>\n | Table 84 \u2013 Parameters for test sequence Dimming curve: DAPC <\/td>\n<\/tr>\n | ||||||
231<\/td>\n | Table 85 \u2013 Parameters for test sequence FADE TIME\/EXTENDED FADE TIME: light output behaviour <\/td>\n<\/tr>\n | ||||||
234<\/td>\n | 12.7 Special commands Table 86 \u2013 Parameters for test sequence Behaviour during a fade <\/td>\n<\/tr>\n | ||||||
237<\/td>\n | Table 87 \u2013 Parameters for test sequence INITIALISE – device addressing <\/td>\n<\/tr>\n | ||||||
239<\/td>\n | Table 88 \u2013 Parameters for test sequence COMPARE <\/td>\n<\/tr>\n | ||||||
240<\/td>\n | Table 89 \u2013 Parameters for test sequence WITHDRAW <\/td>\n<\/tr>\n | ||||||
243<\/td>\n | Table 90 \u2013 Parameters for test sequence PROGRAM SHORT ADDRESS <\/td>\n<\/tr>\n | ||||||
244<\/td>\n | Table 91 \u2013 Parameters for test sequence VERIFY SHORT ADDRESS <\/td>\n<\/tr>\n | ||||||
245<\/td>\n | Table 92 \u2013 Parameters for test sequence QUERY SHORT ADDRESS <\/td>\n<\/tr>\n | ||||||
248<\/td>\n | Table 93 \u2013 Parameters for test sequence IDENTIFY DEVICE <\/td>\n<\/tr>\n | ||||||
252<\/td>\n | 12.8 Queries and reserved commands Table 94 \u2013 Parameters for test sequence IDENTIFY DEVICE THROUGH RECALL MIN\/MAX LEVEL <\/td>\n<\/tr>\n | ||||||
255<\/td>\n | Table 95 \u2013 Parameters for test sequence QUERY STATUS – lampFailure\/lampOn <\/td>\n<\/tr>\n | ||||||
256<\/td>\n | Table 96 \u2013 Parameters for test sequence QUERY STATUS – lampOn <\/td>\n<\/tr>\n | ||||||
258<\/td>\n | Table 97 \u2013 Parameters for test sequence QUERY STATUS – limitError\/lampOn <\/td>\n<\/tr>\n | ||||||
260<\/td>\n | Table 98 \u2013 Parameters for test sequence QUERY STATUS – powerCycleSeen <\/td>\n<\/tr>\n | ||||||
261<\/td>\n | Table 99 \u2013 Parameters for test sequence QUERY CONTROL GEAR PRESENT <\/td>\n<\/tr>\n | ||||||
263<\/td>\n | Table 100 \u2013 Parameters for test sequence Broadcast unaddressed <\/td>\n<\/tr>\n | ||||||
264<\/td>\n | Table 101 \u2013 Parameters for test sequence Reserved commands: standard commands <\/td>\n<\/tr>\n | ||||||
265<\/td>\n | Table 102 \u2013 Parameters for test sequence Reserved commands: special commands <\/td>\n<\/tr>\n | ||||||
268<\/td>\n | 12.9 Cross contamination <\/td>\n<\/tr>\n | ||||||
274<\/td>\n | Table 103 \u2013 Parameters for test sequence Addressing 2 <\/td>\n<\/tr>\n | ||||||
275<\/td>\n | 12.10 General subsequences <\/td>\n<\/tr>\n | ||||||
286<\/td>\n | Annex A (informative) Examples of algorithms A.1 Random address allocation A.2 One single control gear connected to the control device <\/td>\n<\/tr>\n | ||||||
287<\/td>\n | A.3 Using application extended commands <\/td>\n<\/tr>\n | ||||||
288<\/td>\n | Annex B (normative) High resolution dimmer <\/td>\n<\/tr>\n | ||||||
289<\/td>\n | Figure B.1 \u2013 Level behaviour in cases of off-grid starting points <\/td>\n<\/tr>\n | ||||||
290<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Digital addressable lighting interface – General requirements. Control gear<\/b><\/p>\n |